DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 10

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Item
1.3.1 Pin Arrangement
Figure 1.8
HD64F2329B Pin
Arrangement (FP-
128B: Top View)
1.3.3 Pin Functions
Table 1.3 Pin Functions
6.3.5 Chip Select
Signals
Rev.6.00 Sep. 27, 2007 Page viii of xxx
REJ09B0220-0600
Page
15
26
169
Revision (See Manual for Details)
Figure added
Table amended
Description amended
Enabling or disabling of the CSn signal is performed by setting
the data direction register (DDR) for the port corresponding to
the particular CSn pin and either the CS167 enable bit
(CS167E) or the CS25 enable bit (CS25E).
In ROM-disabled expansion mode, the CS0 pin is placed in the
output state after a power-on reset. Pins CS1 to CS7 are placed
in the input state after a power-on reset, so the corresponding
DDR bits, and CS167E or CS25E, should be set to 1 when
outputting signals CS1 to CS7.
In ROM-enabled expansion mode, pins CS0 to CS7 are all
placed in the input state after a power-on reset, so the
corresponding DDR bits, and CS167E or CS25E, should be set
to 1 when outputting signals CS0 to CS7.
MD
0
1
2
MD
0
1
0
1
1
MD
1
0
1
0
1
0
1
0
Operating
Mode
—
Mode 2 *
Mode 3 *
Mode 4 *
Mode 5 *
Mode 6
Mode 7
1
1
2
2