HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 642

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17. Pin Function Controller (PFC)
17.1.1
Port A I/O Register L, H (PAIORL, PAIORH)
The port A I/O register L, H (PAIORL, PAIORH) are 16-bit readable/writable registers that are
used to set the pins on port A as inputs or outputs. Bits PA23IOR to PA0IOR correspond to pins
PA23 to PA0 (names of multiplexed pins are here given as port names and pin numbers alone).
PAIORL is enabled when the port A pins are functioning as general-purpose inputs/outputs (PA15
to PA0), and SCK0 and SCK1 pins are functioning as inputs/outputs of SCI. In other states,
PAIORL is disabled. PAIORH is enabled when the port A pins are functioning as general-purpose
input/output (PA23 to PA16). In other states, PAIORH is disabled.
A given pin on port A will be an output pin if the corresponding bit in PAIORH or PAIORL is set
to 1, and an input pin if the bit is cleared to 0.
Bits 7 to 0 of PAIORH are, however, disabled in SH7144.
Bits 15 to 8 of PAIORH are reserved. These bits are always read as 0. The write value should
always be 0.
The initial values of PAIORL and PAIORH are H'0000, respectively.
Rev.4.00 Mar. 27, 2008 Page 596 of 882
REJ09B0108-0400