HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 191

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6
Bit
6
5
4
3
Bit Name Initial Value R/W
A2LG
A1LG
A0LG
A3SZ
1
0
0
0
R/W
R/W
R/W
R/W
Description
CS2 and CS6 space longword
This bit specifies the CS2 and CS6 space bus size. This
bit is valid only for the SH7145.
This bit is reserved in SH7144. This bit is always read as
0 and should always be written with 0.
0: Depends on the value set with the A2SZ bit in this
1: Longword (32 bits)
CS1 and CS5 space longword
This bit specifies the CS1 and CS5 space bus size. This
bit is valid only for the SH7145.
This bit is reserved in SH7144. This bit is always read as
0 and should always be written with 0.
0: Depends on the value set with the A1SZ bit in this
1: Longword (32 bits)
CS0 and CS4 space longword
This bit specifies the CS0 and CS4 space bus size. This
bit is valid only for the SH7145.
This bit is reserved in SH7144. This bit is always read as
0 and should always be written with 0.
0: Depends on the value set with the A0SZ bit in this
1: Longword (32 bits)
Note: A0LG is valid only in on-chip ROM enabled mode.
CS3 and CS7 space size
This bit specifies the CS3 and CS7 space bus size in
A3LG = 0.
0: Byte (8 bits)
1: Word (16 bits)
Note: In A3LG = 1, this bit is ignored and the CS3 and
register.
register.
register.
The CS0 and CS4 space bus size is specified
with the mode pin in on-chip ROM disabled mode.
CS7 space bus size is longword (32 bits).
Rev.4.00 Mar. 27, 2008 Page 145 of 882
9. Bus State Controller (BSC)
REJ09B0108-0400

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