HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 397

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6
Operation when Error Occurs during PWM Mode 2 Operation, and Operation is Restarted
in Normal Mode: Figure 11.97 shows an explanatory diagram of the case where an error occurs
in PWM mode 2 and operation is restarted in normal mode after re-setting.
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. Set PWM mode 2.
3.
4. Set MTU output with the PFC.
5. The count operation is started by TSTR.
6. Output goes low on compare-match occurrence.
7. An error occurs.
8. Set port output with the PFC and output the inverse of the active level.
9. The count operation is stopped by TSTR.
10. Set normal mode.
11. Initialize the pins with TIOR.
12. Set MTU output with the PFC.
13. Operation is restarted by TSTR.
MTU module output
compare-match occurrence. In PWM mode 2, the cycle register pins are not initialized. In the
example, TIOC *A is the cycle register.)
Initialize the pins with TIOR. (The example shows initial high output, with low output on
Figure 11.97
n=0 to 15
Port output
TIOC*A
TIOC*B
PEn
PEn
RESET
1
Error Occurrence in PWM Mode 2, Recovery in Normal Mode
(PWM2)
TMDR
2
Hi-Z
Hi-Z
0 out)
TIOR
(1 init
3
Not initialized (cycle register)
(MTU)
PFC
4
TSTR
(1)
5
Match
6
occurs
Error
11.
7
Rev.4.00 Mar. 27, 2008 Page 351 of 882
(PORT)
PFC
Multi-Function Timer Pulse Unit (MTU)
8
TSTR
(0)
9
(normal)
TMDR
10
0 out)
TIOR
(1 init
11
REJ09B0108-0400
(MTU)
PFC
12
TSTR
(1)
13

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