HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 609

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.3
16.3.1
When an internal clock is selected with the CKS1, CKS0 bits of the CMCSR register and the STR
bit of CMSTR is set to 1, CMCNT begins incrementing with the selected clock. When the
CMCNT counter value matches that of the compare match constant register (CMCOR), the
CMCNT counter is cleared to H'0000 and the CMF flag of the CMCSR register is set to 1. If the
CMIE bit of the CMCSR register is set to 1 at this time, a compare match interrupt (CMI) is
requested. The CMCNT counter begins counting up again from H'0000.
Figure 16.2 shows the compare match counter operation.
16.3.2
One of four clocks (Pφ/8, Pφ/32, Pφ/128, Pφ/512) obtained by dividing the peripheral clock (Pφ)
can be selected by the CKS1 and CKS0 bits of CMCSR. Figure 16.3 shows the CMCNT count
timing.
Operation
Compare Match Counter Operation
CMCNT Count Timing
Internal
clock
CMCNT
input clock
CMCNT
Pφ
CMCOR
H'0000
CMCNT value
N-1
Figure 16.2 Counter Operation
Figure 16.3 Count Timing
N
Counter cleared by CMCOR
compare match
Rev.4.00 Mar. 27, 2008 Page 563 of 882
16. Compare Match Timer (CMT)
N+1
Time
REJ09B0108-0400