HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 22

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.2 Usage Notes ...................................................................................................................... 631
Section 18 I/O Ports...........................................................................................633
18.1 Port A................................................................................................................................ 634
18.2 Port B ................................................................................................................................ 639
18.3 Port C ................................................................................................................................ 642
18.4 Port D................................................................................................................................ 645
18.5 Port E ................................................................................................................................ 650
18.6 Port F................................................................................................................................. 654
Section 19 Flash Memory (F-ZTAT Version)...................................................657
19.1 Features............................................................................................................................. 657
19.2 Mode Transitions .............................................................................................................. 659
19.3 Block Configuration.......................................................................................................... 663
19.4 Input/Output Pins .............................................................................................................. 664
19.5 Register Descriptions ........................................................................................................ 665
19.6 On-Board Programming Modes........................................................................................ 670
Rev.4.00 Mar. 27, 2008 Page xx of xliv
REJ09B0108-0400
17.1.8 Port D Control Registers L1, L2, H1, H2
17.1.9 Port E I/O Register L (PEIORL).......................................................................... 621
17.1.10 Port E Control Registers L1, L2 (PECRL1, PECRL2) ........................................ 622
17.1.11 High-Current Port Control Register (PPCR)........................................................ 630
18.1.1 Register Descriptions ........................................................................................... 636
18.1.2 Port A Data Registers H and L (PADRH and PADRL)....................................... 636
18.2.1 Register Descriptions ........................................................................................... 639
18.2.2 Port B Data Register (PBDR) .............................................................................. 640
18.3.1 Register Descriptions ........................................................................................... 642
18.3.2 Port C Data Register (PCDR) .............................................................................. 643
18.4.1 Register Descriptions ........................................................................................... 647
18.4.2 Port D Data Registers H and L (PDDRH and PDDRL)....................................... 647
18.5.1 Register Descriptions ........................................................................................... 651
18.5.2 Port E Data Register L (PEDRL)......................................................................... 652
18.6.1 Register Descriptions ........................................................................................... 654
18.6.2 Port F Data Register (PFDR) ............................................................................... 654
19.5.1 Flash Memory Control Register 1 (FLMCR1)..................................................... 665
19.5.2 Flash Memory Control Register 2 (FLMCR2)..................................................... 666
19.5.3 Erase Block Register 1 (EBR1) ........................................................................... 667
19.5.4 Erase Block Register 2 (EBR2) ........................................................................... 668
19.5.5 RAM Emulation Register (RAMER)................................................................... 668
19.6.1 Boot Mode ........................................................................................................... 671
(PDCRL1, PDCRL2, PDCRH1, PDCRH2)......................................................... 612