HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 368

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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11.
11.7.3
When counter clearing on compare match is set, TCNT is cleared in the final state in which it
matches the TGR value (the point at which the count value matched by TCNT is updated).
Consequently, the actual counter frequency is given by the following formula:
Where
11.7.4
If the counter clear signal is generated in the T2 state of a TCNT write cycle, TCNT clearing takes
precedence and the TCNT write is not performed.
Figure 11.71 shows the timing in this case.
Rev.4.00 Mar. 27, 2008 Page 322 of 882
REJ09B0108-0400
Multi-Function Timer Pulse Unit (MTU)
f =
Caution on Period Setting
Contention between TCNT Write and Clear Operations
f:
Pφ: Peripheral clock operating frequency
N: TGR set value
Figure 11.71
(N + 1)
Address
Write signal
Counter clear
signal
TCNT
Counter frequency
Contention between TCNT Write and Clear Operations
TCNT write cycle
N
TCNT address
T1
T2
H'0000

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