HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 25

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 25 List of Registers .............................................................................. 733
25.1 Register Address Table (In the Order from Lower Addresses).........................................734
25.2 Register Bit List ................................................................................................................745
25.3 Register States in Each Operating Mode...........................................................................758
Section 26 Electrical Characteristics ................................................................ 767
26.1 Absolute Maximum Ratings .............................................................................................767
26.2 DC Characteristics ............................................................................................................768
26.3 AC Characteristics ............................................................................................................771
26.4 A/D Converter Characteristics ..........................................................................................795
26.5 Flash Memory Characteristics...........................................................................................796
Appendix A Pin States ...................................................................................... 799
A.
Appendix B Pin States of Bus Related Signals................................................. 809
B.
Appendix C Product Code Lineup.................................................................... 812
Appendix D I/O Port Block Diagrams.............................................................. 813
Appendix E Package Dimensions..................................................................... 870
Main Revisions for this Edition .......................................................................... 873
26.3.1 Test conditions for the AC characteristics ...........................................................771
26.3.2 Clock timing ........................................................................................................772
26.3.3 Control Signal Timing .........................................................................................774
26.3.4 Bus Timing ..........................................................................................................777
26.3.5 Direct Memory Access Controller (DMAC) Timing ...........................................781
26.3.6 Multi-Function Timer Pulse Unit (MTU)Timing.................................................783
26.3.7 I/O Port Timing....................................................................................................784
26.3.8 Watchdog Timer (WDT)Timing ..........................................................................785
26.3.9 Serial Communication Interface (SCI) Timing....................................................786
26.3.10 I
26.3.11 Port Output Enable (POE) Timing.......................................................................789
26.3.12 A/D Converter Timing .........................................................................................790
26.3.13 H-UDI Timing .....................................................................................................791
26.3.14 AUD Timing ........................................................................................................793
Pin State ............................................................................................................................799
Pin States of Bus Related Signals .....................................................................................809
2
C Bus Interface Timing .....................................................................................788
Rev.4.00 Mar. 27, 2008, Page xxiii of xliv
REJ09B0108-0400