HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 410

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6
11.
Operation when Error Occurs during Reset-Synchronous PWM Mode Operation, and
Operation is Restarted in Normal Mode: Figure 11.110 shows an explanatory diagram of the
case where an error occurs in reset-synchronous PWM mode and operation is restarted in normal
mode after re-setting.
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. Select the reset-synchronous PWM output level and cyclic output enabling/disabling with
3. Set reset-synchronous PWM.
4. Enable channel 3 and 4 output with TOER.
5. Set MTU output with the PFC.
6. The count operation is started by TSTR.
7. The reset-synchronous PWM waveform is output on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR. (MTU output becomes the reset-synchronous PWM
11. Set normal mode. (MTU positive phase output is low, and negative phase output is high.)
12. Initialize the pins with TIOR.
13. Set MTU output with the PFC.
14. Operation is restarted by TSTR.
Rev.4.00 Mar. 27, 2008 Page 364 of 882
REJ09B0108-0400
MTU module output
TOCR.
output initial value.)
Multi-Function Timer Pulse Unit (MTU)
Port output
TIOC3D
TIOC3A
TIOC3B
Figure 11.110
PE11
PE8
PE9
RESET
1
TOCR
2
(CPWM)
Hi-Z
Hi-Z
Hi-Z
TMDR
Error Occurrence in Reset-Synchronous PWM Mode,
3
TOER
Recovery in Normal Mode
(1)
4
(MTU)
PFC
5
TSTR
(1)
6
Match
7
occurs
Error
8
(PORT)
PFC
9
TSTR
10
(0)
(normal)
TMDR
11
0 out)
TIOR
(1 init
12
(MTU)
PFC
13
TSTR
14
(1)

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