HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 487
HD64F7144F50V
Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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HD64F7144F50V
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Figure 13.13 Sample Multiprocessor Serial Reception Flowchart (1)
No
No
No
Read ORER and FER flags
Read ORER and FER flags
Read receive data in RDR
Read receive data in RDR
Set MPIE bit in SCR to 1
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit in SCR to 0
All data received?
This station’s ID?
FER∨ORER = 1
FER∨ORER = 1
Start reception
Initialization
RDRF = 1
RDRF = 1
in SSR
in SSR
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Error processing
Yes
(Continued on
[3]
[1]
[2]
next page)
[4]
[5]
[1] SCI initialization:
[2] ID reception cycle:
[3] SCI status check, ID reception and
[4] SCI status check and data reception:
[5] Receive error processing and break
13. Serial Communication Interface (SCI)
Rev.4.00 Mar. 27, 2008 Page 441 of 882
Set the RxD pin using the PFC.
Set the MPIE bit in SCR to 1.
comparison:
Read SSR and check that the RDRF
flag is set to 1, then read the receive
data in RDR and compare it with this
station’s ID.
If the data is not this station’s ID, set the
MPIE bit to 1 again, and clear the RDRF
flag to 0.
If the data is this station’s ID, clear the
RDRF flag to 0.
Read SSR and check that the RDRF
flag is set to 1, then read the data in
RDR.
detection:
If a receive error occurs, read the ORER
and FER flags in SSR to identify the
error. After performing the appropriate
error processing, ensure that the ORER
and FER flags are all cleared to 0.
Reception cannot be resumed if either
of these flags is set to 1.
In the case of a framing error, a break
can be detected by reading the RxD pin
value.
REJ09B0108-0400
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