HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 758

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Appendix B Register Field
TSR0—Timer Status Register 0
Rev.3.00 Mar. 26, 2007 Page 716 of 772
REJ09B0355-0300
Bit
Initial value
Read/Write
:
:
:
7
1
6
1
5
0
Notes: 1. Can only be written with 0 for flag clearing.
Overflow Flag
0
1
R/(W) *
TCFV
4
0
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
2. DTC can clear this bit only when DISEL is 0 with the transfer counter not being 0.
1
TGRD·Input Capture/Output Compare Flag
0
1
R/(W) *
TGFD
3
0
[Clearing conditions]
• When DTC *
• When 0 is written to TGFD after reading TGFD = 1
[Setting conditions]
• When TCNT = TGRD while TGRD is functioning as output compare register
• When TCNT value is transferred to TGRD by input capture signal while
is 0
TGRD is functioning as input capture register
TGRC·Input Capture/Output Compare Flag
1
0
1
R/(W) *
TGFC
[Clearing conditions]
• When DTC *
• When 0 is written to TGFC after reading TGFC = 1
[Setting conditions]
• When TCNT = TGRC while TGRC is functioning as output compare
• When TCNT value is transferred to TGRC by input capture signal
2
0
DTC is 0
register
while TGRC is functioning as input capture register
1
TGRB·Input Capture/Output Compare Flag
2
is activated by TGID interrupt while DISEL bit of MRB in DTC
0
1
R/(W) *
TGFB
1
0
[Clearing conditions]
• When DTC *
• When 0 is written to TGFB after reading TGFB = 1
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
H'FFD5
TGRA·Input Capture/Output Compare Flag
bit of MRB in DTC is 0.
output compare register
capture signal while TGRB is functioning as input
capture register
1
2
0
1
is activated by TGIC interrupt while DISEL bit of MRB in
R/(W) *
TGFA
0
0
[Clearing conditions]
• When DTC *
• When 0 is written to TGFA after reading
[Setting conditions]
• When TCNT = TGRA while TGRA is function-
• When TCNT value is transferred to TGRA by
while DISEL bit of MRB in DTC is 0.
TGFA = 1
ing as output compare register
input capture signal while TGRA is functioning
as input capture register
1
2
is activated by TGIB interrupt while DISEL
2
is activated by TGIA interrupt
TPU0

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