HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 669

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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A.3
The tables in this section can be used to calculate the number of states required for instruction
execution by the H8S/2000 CPU. Table A.4 indicates the number of instruction fetch, data
read/write, and other cycles occurring in each instruction. Table A.3 indicates the number of states
required for each cycle, depending on its size. The number of states required for execution of an
instruction can be calculated from these two tables as follows:
Examples: Advanced mode, program code and stack located in external memory, on-chip
supporting modules accessed in two states with 8-bit bus width, external devices accessed in three
states with one wait state and 16-bit bus width.
1. BSET #0, @FFFFC7:8
2. JSR @@30
From table A.4:
From table A.3:
Number of states required for execution = 2
From table A.4:
From table A.3:
Number of states required for execution = 2
Execution states = I
I = L = 2, J = K = M = N = 0
S
I = J = K = 2, L = M = N = 0
S
I
I
Number of States Required for Instruction Execution
= 4, S
= S
J
= S
L
K
= 2
= 4
S
I
+ J S
J
+ K
S
K
+ L
4 + 2
4 + 2
S
L
+ M
Rev.3.00 Mar. 26, 2007 Page 627 of 772
2 = 12
4 + 2
S
M
4 = 24
+ N
Appendix A Instruction Set
S
N
REJ09B0355-0300

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