HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 394

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 16-Bit Timer Pulse Unit (TPU)
9.7
Note that the kinds of operation and contention described below occur during TPU operation.
Module Stop Mode Setting
TPU operation can be disabled or enabled using the module stop control register. The initial
setting is for TPU operation to be halted. Register access is enabled by clearing module stop
mode. For details, refer to section 18, Power-Down Modes.
Input Clock Restrictions
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The TPU will not operate properly with a
narrower pulse width.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 1.5 states, and the pulse width must be at least 2.5 states. Figure 9.44 shows the input clock
conditions in phase counting mode.
Rev.3.00 Mar. 26, 2007 Page 352 of 772
REJ09B0355-0300
TCLKA
(TCLKC)
TCLKB
(TCLKD)
Notes: Phase difference and overlap : 1.5 states or more
Figure 9.44 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
Usage Notes
Pulse width
Overlap
Pulse width
Phase
differ-
ence
Overlap
: 2.5 states or more
Phase
differ-
ence
Pulse width
Pulse width
Pulse width