HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 361

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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9.4
9.4.1
Operation in each mode is outlined below.
Normal Operation
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, synchronous counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
Synchronous Operation
When synchronous operation is designated for a channel, TCNT for that channel performs
synchronous presetting. That is, when TCNT for a channel designated for synchronous operation
is rewritten, the TCNT counters for the other channels are also rewritten at the same time.
Synchronous clearing of the TCNT counters is also possible by setting the timer synchronization
bits in TSYR for channels designated for synchronous operation.
Buffer Operation
PWM Mode
In this mode, a PWM waveform is output. The output level can be set by means of TIOR. A PWM
waveform with a duty of between 0% and 100% can be output, according to the setting of each
TGR register.
When TGR is an output compare register
When a compare match occurs, the value in the buffer register for the relevant channel is
transferred to TGR.
When TGR is an input capture register
When input capture occurs, the value in TCNT is transfer to TGR and the value previously
held in TGR is transferred to the buffer register.
Operation
Overview
Rev.3.00 Mar. 26, 2007 Page 319 of 772
Section 9 16-Bit Timer Pulse Unit (TPU)
REJ09B0355-0300

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