HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 231

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Table 7.2 outlines the functions of the DTC.
Table 7.2
7.3.2
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. An interrupt becomes a DTC activation source when the corresponding bit is set to 1, and a
CPU interrupt source when the bit is cleared to 0.
At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 7.3 shows activation source and
Transfer Mode
Normal mode
Repeat mode
Block transfer mode
One transfer request transfers one
byte or one word
Memory addresses are incremented
or decremented by 1 or 2
Up to 65,536 transfers possible
One transfer request transfers one
byte or one word
Memory addresses are incremented
or decremented by 1 or 2
After the specified number of transfers
(1 to 256), the initial state resumes and
operation continues
One transfer request transfers a block
of the specified size
Block size is from 1 to 256 bytes or
words
Up to 65,536 transfers possible
A block area can be designated at either
the source or destination
Activation Sources
DTC Functions
Activation Source
IRQ
TPU TGI
8-bit timer CMI
SCI TXI or RXI
A/D converter ADI
Software
Rev.3.00 Mar. 26, 2007 Page 189 of 772
Section 7 Data Transfer Controller
Transfer
Source
24 bits
Address Registers
REJ09B0355-0300
Transfer
Destination
24 bits

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