HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 372

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 16-Bit Timer Pulse Unit (TPU)
Examples of Buffer Operation
When TGR is an output compare register: Figure 9.19 shows an operation example in which
PWM mode 1 has been designated for channel 0, and buffer operation has been designated for
TGRA and TGRC. The settings used in this example are TCNT clearing by compare match B, 1
output at compare match A, and 0 output at compare match B.
As buffer operation has been set, when compare match A occurs the output changes and the value
in buffer register TGRC is simultaneously transferred to timer general register TGRA. This
operation is repeated each time compare match A occurs.
For details of PWM modes, see section 9.4.5, PWM Modes.
Rev.3.00 Mar. 26, 2007 Page 330 of 772
REJ09B0355-0300
TGR0B
TGR0A
H'0000
TGR0C
TGR0A
TIOCA
TCNT value
Transfer
H'0200
H'0200
Figure 9.19 Example of Buffer Operation (1)
H'0200
H'0450
H'0450
H'0450
H'0520
H'0520
Time