HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 31

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

4.3
4.4
4.5
4.6
Section 5 Interrupt Controller
5.1
5.2
5.3
5.4
5.5
5.6
4.2.4
4.2.5
Interrupts ........................................................................................................................... 99
Trap Instruction................................................................................................................. 100
Stack Status after Exception Handling.............................................................................. 101
Notes on Use of the Stack ................................................................................................. 102
Overview........................................................................................................................... 103
5.1.1
5.1.2
5.1.3
5.1.4
Register Descriptions ........................................................................................................ 106
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
Interrupt Sources ............................................................................................................... 111
5.3.1
5.3.2
5.3.3
Interrupt Operation............................................................................................................ 116
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
Usage Notes ...................................................................................................................... 126
5.5.1
5.5.2
5.5.3
5.5.4
5.5.5
5.5.6
DTC Activation by Interrupt............................................................................................. 128
5.6.1
5.6.2
5.6.3
Interrupts after Reset............................................................................................ 98
State of On-Chip Supporting Modules after Reset Release ................................. 98
Features................................................................................................................ 103
Block Diagram ..................................................................................................... 104
Pin Configuration................................................................................................. 105
Register Configuration......................................................................................... 105
System Control Register (SYSCR) ...................................................................... 106
Interrupt Control Registers A to C (ICRA to ICRC)............................................ 107
IRQ Enable Register (IER) .................................................................................. 108
IRQ Sense Control Registers H and L (ISCRH, ISCRL)..................................... 108
IRQ Status Register (ISR).................................................................................... 109
External Interrupts ............................................................................................... 111
Internal Interrupts................................................................................................. 112
Interrupt Exception Handling Vector Table......................................................... 112
Interrupt Control Modes and Interrupt Operation ................................................ 116
Interrupt Control Mode 0 ..................................................................................... 119
Interrupt Control Mode 1 ..................................................................................... 121
Interrupt Exception Handling Sequence .............................................................. 124
Interrupt Response Times .................................................................................... 125
Contention between Interrupt Generation and Disabling..................................... 126
Instructions that Disable Interrupts ...................................................................... 127
Times when Interrupts Are Disabled ................................................................... 127
Interrupts during Execution of EEPMOV Instruction.......................................... 127
IRQ Interrupt........................................................................................................ 127
NMI Interrupt Usage Notes.................................................................................. 128
Overview.............................................................................................................. 128
Block Diagram ..................................................................................................... 129
Operation ............................................................................................................. 129
.......................................................................................... 103
Rev.3.00 Mar. 26, 2007 Page xxxi of xlii
REJ09B0355-0300