HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 492

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Serial Communication Interface (SCI)
Rev.3.00 Mar. 26, 2007 Page 450 of 772
REJ09B0355-0300
No
No
No
Figure 12.12 Sample Multiprocessor Serial Reception Flowchart
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data in RDR
Read receive data in RDR
Clear RE bit in SCR to 0
Read RDRF flag in SSR
Read RDRF flag in SSR
Read MPIE bit in SCR
FER
FER
All data received?
This station's ID?
Start reception
Initialization
RDRF = 1?
RDRF = 1?
<End>
ORER = 1?
ORER = 1?
Yes
Yes
Yes
Yes
No
No
Yes
No
Yes
Error processing
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[5]
[1]
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SCI initialization:
The RxD pin is automatically
designated as the receive data
input pin.
ID reception cycle:
Set the MPIE bit in SCR to 1.
SCI status check, ID reception
and comparison:
Read SSR and check that the
RDRF flag is set to 1, then read
the receive data in RDR and
compare it with this station's ID.
If the data is not this station's ID,
set the MPIE bit to 1 again, and
clear the RDRF flag to 0.
If the data is this station's ID,
clear the RDRF flag to 0.
SCI status check and data
reception:
Read SSR and check that the
RDRF flag is set to 1, then read
the data in RDR.
Receive error processing and
break detection:
If a receive error occurs, read the
ORER and FER flags in SSR to
identify the error. After
performing the appropriate error
processing, ensure that the
ORER and FER flags are all
cleared to 0.
Reception cannot be resumed if
either of these flags is set to 1.
In the case of a framing error, a
break can be detected by reading
the RxD pin value.