HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 352

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 9 16-Bit Timer Pulse Unit (TPU)
The TSR registers are 8-bit registers that indicate the status of each channel. The TPU has three
TSR registers, one for each channel. The TSR registers are initialized to H'C0 by a reset, and in
hardware standby mode.
Bit 7—Count Direction Flag (TCFD): Status flag that shows the direction in which TCNT
counts in channels 1, and 2.
In channel 0 bit 7 is reserved. It is always read as 1 and cannot be modified.
Bit 7
TCFD
0
1
Bit 6—Reserved: Read-only bit, always read as 1.
Bit 5—Underflow Flag (TCFU): Status flag that indicates that TCNT underflow has occurred
when channels 1 and 2 are set to phase counting mode.
In channel 0 bit 5 is reserved. It is always read as 0 and cannot be modified.
Bit 5
TCFU
0
1
Bit 4—Overflow Flag (TCFV): Status flag that indicates that TCNT overflow has occurred.
Bit 4
TCFV
0
1
Rev.3.00 Mar. 26, 2007 Page 310 of 772
REJ09B0355-0300
Description
TCNT counts down
TCNT counts up
Description
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
Description
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
(Initial value)
(Initial value)
(Initial value)

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