HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 481

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

In serial transmission, the SCI operates as described below.
[1] The SCI monitors the TDRE flag in SSR, and if is 0, recognizes that data has been written to
[2] After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
[3] The SCI checks the TDRE flag at the timing for sending the stop bit.
TDR, and transfers the data from TDR to TSR.
transmission.
If the TIE bit is set to 1 at this time, a transmit data empty interrupt (TXI) is generated.
The serial transmit data is sent from the TxD pin in the following order.
[a] Start bit:
[b] Transmit data:
[c] Parity bit or multiprocessor bit:
[d] Stop bit(s):
[e] Mark state:
If the TDRE flag is cleared to 0, the data is transferred from TDR to TSR, the stop bit is sent,
and then serial transmission of the next frame is started.
If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, the stop bit is sent, and then the
"mark state" is entered in which 1 is output continuously. If the TEIE bit in SCR is set to 1 at
this time, a TEI interrupt request is generated.
One 0-bit is output.
8-bit or 7-bit data is output in LSB-first order.
One parity bit (even or odd parity), or one multiprocessor bit is output.
A format in which neither a parity bit nor a multiprocessor bit is output can also be
selected.
One or two 1-bits (stop bits) are output.
1 is output continuously until the start bit that starts the next transmission is sent.
Section 12 Serial Communication Interface (SCI)
Rev.3.00 Mar. 26, 2007 Page 439 of 772
REJ09B0355-0300