HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 403

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Contention between TCNT Write and Overflow/Underflow
If there is an up-count or down-count in the T2 state of a TCNT write cycle, and
overflow/underflow occurs, the TCNT write takes precedence and the TCFV/TCFU flag in TSR is
not set.
Figure 9.53 shows the operation timing in the case of contention between a TCNT write and
overflow.
Multiplexing of I/O Pins
In the H8S/2245 Group, the TCLKA input pin is multiplexed with the TIOCC0 I/O pin, the
TCLKB input pin with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O pin, and
the TCLKD input pin with the TIOCB2 I/O pin. When an external clock is input, compare match
output should not be performed from a multiplexed pin.
Interrupts and Module Stop Mode
If module stop mode is entered when an interrupt has been requested, it will not be possible to
clear the CPU interrupt source or DTC activation source. Interrupts should therefore be disabled
before entering module stop mode.
Address
Write signal
TCNT
TCFV flag
Figure 9.53 Contention between TCNT Write and Overflow
H'FFFF
Prohibited
TCNT write cycle
TCNT address
T1
T2
Rev.3.00 Mar. 26, 2007 Page 361 of 772
Section 9 16-Bit Timer Pulse Unit (TPU)
M
TCNT write data
REJ09B0355-0300