HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 220

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 Data Transfer Controller
7.1.2
Figure 7.1 shows a block diagram of the DTC.
The DTC's register information is stored in the on-chip RAM*. A 32-bit bus connects the DTC to
the on-chip RAM (1 kbyte), enabling 32-bit/1-state reading and writing of the DTC register
information and hence helping to increase processing speed.
Note: * When the DTC is used, the RAME bit SYSCR must be set to 1.
Rev.3.00 Mar. 26, 2007 Page 178 of 772
REJ09B0355-0300
Interrupt
request
Block Diagram
Legend:
MRA, MRB
CRA, CRB
SAR
DAR
DTCERA to DTCERF
DTVECR
Interrupt controller
CPU interrupt
request
Figure 7.1 Block Diagram of DTC
: DTC mode registers A and B
: DTC transfer count registers A and B
: DTC source address register
: DTC destination address register
: DTC enable registers A to F
: DTC vector register
DTC
Internal address bus
Internal data bus
On-chip
RAM