HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 228

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 Data Transfer Controller
7.2.8
DTVECR is an 8-bit readable/writable register that enables or disables DTC activation by
software, and sets a vector number for the software activation interrupt.
DTVECR is initialized to H'00 by a reset and in hardware standby mode.
Bit 7—DTC Software Activation Enable (SWDTE): Enables or disables DTC activation by
software.
Bit 7
SWDTE
0
1
Bits 6 to 0—DTC Software Activation Vectors 6 to 0 (DTVEC6 to DTVEC0): These bits
specify a vector number for DTC software activation.
The vector address is expressed as H'0400 + ((vector number) << 1). <<1 indicates a one-bit left-
shift. For example, when DTVEC6 to DTVEC0 = H'10, the vector address is H'0420.
Rev.3.00 Mar. 26, 2007 Page 186 of 772
REJ09B0355-0300
Notes:
Bit
Initial value
R/W
DTC Vector Register (DTVECR)
1. A value of 1 can only be written to the SWDTE bit.
2. DTVEC6 to DTVEC0 bits can only be written when SWDTE = 0.
Description
DTC software activation is disabled
[Clearing conditions]
1. When DISEL = 0 and the specified number of transfers have not ended
2. When 0 is written to the DISEL bit after a software-activated data transfer end
DTC software activation is enabled
[Holding conditions]
1. When DISEL = 1 and data transfer ends
2. When the specified number of transfers end
3. During data transfer due to software activation
:
:
:
interrupt (SWDTEND) request has been sent to the CPU.
SWDTE
R/(W) *
7
0
1
DTVEC6
R/(W) *
6
0
2
DTVEC5
R/(W) *
5
0
2
DTVEC4
R/(W) *
4
0
2
DTVEC3
R/(W) *
3
0
2
DTVEC2
R/(W) *
2
0
2
DTVEC1
R/(W) *
1
0
2
(Initial value)
DTVEC0
R/(W) *
0
0
2