HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 184

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 6 Bus Controller
Bit 5—Burst ROM Enable (BRSTRM): Selects whether area 0 is used as a burst ROM
interface. In normal mode, the selection can be made from the entire external space.
Bit 5
BRSTRM
0
1
Bit 4—Burst Cycle Select 1 (BRSTS1): Selects the number of burst cycles for the burst ROM
interface.
Bit 4
BRSTS1
0
1
Bit 3—Burst Cycle Select 0 (BRSTS0): Selects the number of words that can be accessed in a
burst ROM interface burst access.
Bit 3
BRSTS0
0
1
Bits 2 to 0—Reserved: Only 0 should be written to these bits.
Rev.3.00 Mar. 26, 2007 Page 142 of 772
REJ09B0355-0300
Description
Area 0 is basic bus interface
Area 0 is burst ROM interface
Description
Burst cycle comprises 1 state
Burst cycle comprises 2 states
Description
Max. 4 words in burst access
Max. 8 words in burst access
(Initial value)
(Initial value)
(Initial value)

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