HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 521

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit 4—Error Signal Status (ERS): In Smart Card interface mode, bit 4 indicates the status of the
error signal sent back from the receiving end in transmission. Framing errors are not detected in
Smart Card interface mode.
Note: Clearing the TE bit in SCR to 0 does not affect the ERS flag, which retains its previous
Bits 3 to 0—Operate in the same way as for the normal SCI. For details, see section 12.2.7, Serial
Status Register (SSR).
However, the setting conditions for the TEND bit, are as shown below.
Notes: etu: Elementary Time Unit (time for transfer of 1 bit)
Bit 4
ERS
0
1
Bit 2
TEND
0
1
state.
* DTC can clear this bit only when DISEL is 0 with the transfer counter not being 0.
Description
[Clearing conditions]
[Setting condition]
When the low level of the error signal is sampled
Description
[Clearing conditions]
[Setting conditions]
Upon reset, and in standby mode or module stop mode
When 0 is written to ERS after reading ERS = 1
When 0 is written to TDRE after reading TDRE = 1
When the DTC* is activated by a TXI interrupt and write data to TDR
Upon reset, and in standby mode or module stop mode
When the TE bit in SCR is 0 and the ERS bit is also 0
When TDRE = 1 and ERS = 0 (normal transmission) 12.5 etu after transmission of
a 1-byte serial character when GM = 0
When TDRE = 1 and ERS = 0 (normal transmission) 11.0 etu after transmission of
a 1-byte serial character when GM = 1
Rev.3.00 Mar. 26, 2007 Page 479 of 772
Section 13 Smart Card Interface
REJ09B0355-0300
(Initial value)
(Initial value)