HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 459

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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12.2.7
SSR is an 8-bit register containing status flags that indicate the operating status of the SCI, and
multiprocessor bits.
SSR can be read or written to by the CPU at all times. However, 1 cannot be written to flags
TDRE, RDRF, ORER, PER, and FER. Also note that in order to clear these flags they must be
read as 1 beforehand. The TEND flag and MPB flag are read-only flags and cannot be modified.
SSR is initialized to H'84 by a reset, and in standby mode or module stop mode.
Bit 7—Transmit Data Register Empty (TDRE): Indicates that data has been transferred from
TDR to TSR and the next serial data can be written to TDR.
Note:
Bit 7
TDRE
0
1
Bit
Initial value
R/W
Note: * Only 0 can be written, to clear the flag.
* DTC can clear this bit only when DISEL is 0 with the transfer counter not being 0.
Serial Status Register (SSR)
Description
[Clearing conditions]
[Setting conditions]
:
:
:
When 0 is written to TDRE after reading TDRE = 1
When the DTC* is activated by a TXI interrupt and write data to TDR
When the TE bit in SCR is 0
When data is transferred from TDR to TSR and data can be written to TDR
R/(W)*
TDRE
7
1
R/(W)*
RDRF
6
0
R/(W)*
ORER
5
0
R/(W)*
Section 12 Serial Communication Interface (SCI)
FER
4
0
Rev.3.00 Mar. 26, 2007 Page 417 of 772
R/(W)*
PER
3
0
TEND
R
2
1
REJ09B0355-0300
MPB
R
1
0
(Initial value)
MPBT
R/W
0
0

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