HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 102

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
(2) Reset Exception Handling
After the RES pin has gone low and the reset state has been entered, when RES goes high again,
reset exception handling starts. When reset exception handling starts the CPU fetches a start
address (vector) from the exception vector table and starts program execution from that address.
All interrupts, including NMI, are disabled during reset exception handling and after it ends.
(3) Interrupt Exception Handling and Trap Instruction Exception Handling
When interrupt or trap-instruction exception handling begins, the CPU references the stack pointer
(ER7) and pushes the program counter and other control registers onto the stack. Next, the CPU
alters the settings of the interrupt mask bits in the control registers. Then the CPU fetches a start
address (vector) from the exception vector table and program execution starts from that start
address.
Figure 2.16 shows the stack after exception handling ends.
Rev.3.00 Mar. 26, 2007 Page 60 of 772
REJ09B0355-0300
SP
Note: * Ignored when returning.
Figure 2.16 Stack Structure after Exception Handling (Examples)
Normal mode
(16 bits)
CCR
CCR *
PC
SP
Advanced mode
(24 bits)
CCR
PC