TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 99

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

1. DMACIntStatus (DMAC Interrupt Status Register)
DMACC0Configuration
DMACC0Configuration
DMA Terminal Count Interrup
DMA Transfer Error Interrupt
[31:8]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[7]
[Description]
a. <IntStatus[7:0]>
Bit
Indicates the status of the DMAC interrupt after reflecting the status of the terminal
count interrupt enable register and error interrupt enable register. An interrupt is
requested when a transfer error occurs or the counter completes counting.
IntStatus7
IntStatus6
IntStatus5
IntStatus4
IntStatus3
IntStatus2
IntStatus1
IntStatus0
Symbol
<ITC>
<IE>
Bit
t
Figure 3.8.1 Block diagram for Interrupt
RO
RO
RO
RO
RO
RO
RO
RO
Type
TMPA901CM- 98
Undefined
0y0
0y0
0y0
0y0
0y0
0y0
0y0
0y0
Reset
Value
DMACIntTCStatus
DMACRawIntErrorStatus
(Raw Transfer Error Interrupt)
DMACRawIntTCStatus
(Raw Terminal Count Interrupt)
DMACIntErrorStatus
(Masked Transfer Error Interrupt)
DMACIntStatus <IntStatus0>
(Masked Transfer Error Interrupt)
Read as undefined.
DMAC channel 7 interrupt status
0y1 Interrupt requested
0y0: Interrupt not requested
DMAC channel 6 interrupt status
0y1: Interrupt requested
0y0: Interrupt not requested
DMAC channel 5 interrupt status
0y1: Interrupt requested
0y0: Interrupt not requested
DMAC channel 4 interrupt status
0y1: Interrupt requested
0y0: Interrupt not requesed
DMAC channel 3 interrupt status
0y1: Interrupt requested
0y0: Interrupt not requested
DMAC channel 2 interrupt status
0y1: Interrupt requested
0y0: Interrupt not requested
DMAC channel 1 interrupt status
0y1: Interrupt requested
0y0: Interrupt not requested
DMAC channel 0 interrupt status
0y1: Interrupt requested
0y0: Interrupt not requested
Address
Description
<
IntStatusTC0>
(0xF410_0000) + (0x0000)
TMPA901CM
2010-07-29