TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 569

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

4. Resume Operation *3
suspend_x
(UDC2-Output)
SuspendM
(PHY-Input)
(PHY-Output)
(1)
DDP/DDM
CLK
Resume Operation by the Host
T0: suspend_x output of UDC2 = “L”
T1: Start of host resume (No timing specifications)
T2: Resuming of clock supply from USB 2.0 PHY (Depends on the PHY specifications.)
T3: End of host resume (more than 20 ms after T1)
time
The host starts resume operation (“FS-K”) at arbitrary timing to wake up the device from
the suspend state. At this point, UDC2 sets suspend_x to “H”. (Even if the clock input to
UDC2 is stopped, suspend_x becomes “H”.) After checking that suspend_x = “H”, disable
the SuspendM (UTMI) input to PHY to resume the clock output from USB 2.0 PHY.
The host resume operation (“FS-K”) lasts for more than 20 ms, and completes after “SE0”.
UDC2 resumes operating at the same speed (HS/FS) as before the suspend state was
entered.
T0
Figure 3.16.31 Resume operation timing by the host
FS Idle (”J”)
TMPA901CM- 568
T1
CLK-Stop
“K” State
T2
T3
TMPA901CM
SE0
2010-07-29