TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 11

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

SA0 to SA7
D0 to D7
SB0 to SB7
D8 to D15
SE0 to SE7
A0 to A7
SF0 to SF7
A8 to A15
SG0 to SG7
A16 to A23
SH2
SMCBE0n
SK5
SMCBE1n
SH3
SMCCS0n
SH4
SMCCS1n
SH7
DMCCSn
SJ0
SMCOEn
SJ1
DMCWEn
SJ2
DMCRASn
SJ3
DMCCASn
2.2
Pin name
depending on the status of the external pin “SELMEMC”.
The names and functions of I/O pins are shown below.
Pins associated with memory are switched to either of two types of MPMC (MPMC0/1)
Pin Names and Functions
Note: Pin names "SA0 through SA7, …, and SR0 through SR4” are symbols used for convenience and are different
Number of pins
from general-purpose port functions “PA0 through PA7, …, and PV0 through PV7."
8
8
8
8
8
1
1
1
1
1
1
1
1
1
Input/Output
Input/Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input/Output
Table 2.2.1 Pin names and functions (1/6)
－
Data: Data bus D0 to D7
－
Data: Data bus D8 to D15
－
Address: Address bus A0 to A7
－
Address: Address bus A8 to A15
－
Address: Address bus A16 to A23
－
Byte enable signal (D0 to D7) for
NORF/SRAM/MROM
－
Byte enable signal (D8 to D15) for
NORF/SRAM/MROM
－
Chip select signal 0 for NORF/SRAM/MROM
－
Chip select signal 1 for NORF/SRAM/MROM
－
Write-enable signal for SDR_SDRAM
Write-enable signal for DDR_SDRAM
－
Out-enable signal for NORF/SRAM/MROM
－
Write-enable signal for SDR_SDRAM
Write-enable signal for DDR_SDRAM
Row address strobe signal for SDR_SDRAM
Row address strobe signal for DDR_SDRAM
Column address strobe signal for SDR_SDRAM
Column address strobe signal for DDR_SDRAM
TMPA901CM- 10
Function
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
－
For both MPMC0 and MPMC1
When using MPMC0
When using MPMC1
－
For both MPMC0 and MPMC1
－
When using MPMC0
When using MPMC1
－
When using MPMC0
When using MPMC1
－
When using MPMC0
When using MPMC1
Remarks
TMPA901CM
2010-07-29