TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 88

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

5. VICINTENABLE (Interrupt Enable Register)
[31:0]
[31:0]
[Description]
a. <IntEnable>
Bit
Bit
sources please
READ: Status read register of Interrupt Enable/Disable
WRITE: Setting register of Interrupt Enable
IntEnable [31:0] correspond to interrupt source numbers 31 to 0, respectively.
About the information for interrupt sources of each circuit, refer the Table 3.7.1 Interrupt
Example: When bit 0 of this register is set to 1, the WDT interrupt (interrupt source number 0) is enabled.
VICINTENCLEAR register.
This register can be set only from disable to enable. Disable setting is controlled by
IntEnable
IntEnable
Symbol
Symbol
Bit
Bit
RO
WO
Type
Type
TMPA901CM- 87
0x00000000
0x00000000
Reset
Reset
Value
Value
Interrupt enable (for each bit)
0y0: Disable
0y1: Enable
Interrupt enable (for each bit)
0y0: Invalid
0y1: Enable
Address
Address
(0xF400_0000) + (0x0010)
(0xF400_0000) + (0x0010)
Description
Description
TMPA901CM
2010-07-29