TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 282

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
Note : If the error address (after conversion) is in the range of 0x000 to 0x007, it indicates that an error bit exists in
Reed-Solomon ECC
1. If the error address indicated by the NDRSCAn register is in the range of 0x000 to
2. If the error address indicated by the NDRSCAn register is in the range of 0x008 to
redundant area (ECC). In this case, no error correction is needed. If the number of error bits is not more than
4 symbols, the Reed-Solomon ECC calculation method calculates each error bit precisely even if it is in the
redundant area (ECC).
Example 1: When NDRSCAn
Example 2: When NDRSCAn
0x007, this error exists in the ECC area and no correction is needed in this case. (It
is not able to correct the error in the ECC area. Note, however, that if the error
exists in the ECC area, this LSI has only the ability to correct errors up to 4 symbols
including the error in the ECC area.
0x207, the error address is obtained by subtracting this address from 0x207.
The ECC generator generates 80 bits of ECC for up to 518 bytes of valid data. If
the NAND-Flash memory to be used has a large-capacity page size (e.g. 2048
bytes), the error correction process must be repeated several times to cover the
entire page.
Basically no calculation is needed for error correction. If error detection is
performed properly, the NDFC only needs to refer to the error address and error
bit. However, it may be necessary to convert the error address, as explained
below.
Because the error address is in the range of 0x000 to 0x007, no correction is needed.
(Although an error exists in bit 2, no correction is needed.)
Error correction is performed by inverting the data in bits 7 and 0 at address 0x184 (0x207 – 0x083).
TMPA901CM- 281
0x005 and NDRSCDn
0x083 and NDRSCDn
0x04
0x81
0y0000_0100
0y1000_0001
TMPA901CM
2010-07-29

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