TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 661

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

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Bit
1. LDACR0 (LCDDA Control Register 0)
ERRINTF
EINTF
ERRINTM
EINTM
BCENYB
AUTOHP
DMAMD
DMAEN
BCENYT
DTFMT
BCENX
PCEN
S1ADR[31:24]
Symbol
Bit
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Undefined
0y0
0y0
Undefined
0y0
0y0
0y0
0y0
0y0
0y0
0y0
0y0
0y0
0y1
0x00
Reset
Value
TMPA901CM- 660
Read as undefined. Write as zero.
LCDDA processing error flag
During READ
0y0: No interrupt
0y1: With interrupt
Scaler 1-line processing end interrupt enable
(Enabled by Scaler/Rotation function)
During READ
0y0: No interrupt
0y1: With interrupt
Read as undefined. Write as zero.
LCDDA processing error interrupt MASK
0y0: Interrupt mask
0y1: Interrupt enabled
LCDDA 1-image processing end interrupt MASK
(Enabled by scaler/Rotation function)
0y0: Interrupt mask
0y1: Interrupt enabled
Y-direction last LINE data correction (Last dummy line
addition)
0y0: OFF
0y1: ON
Automatic calculation of HOT point
0y0: OFF
0y1: ON
DMA select
0y0: Single transfer
0y1: Burst transfer
DMA enable.
0y0: OFF
0y1: Enable
Y-direction front LINE data correction (Front dummy line
addition)
0y0: OFF
0y1: ON
Display color select
0y0: Reserved
0y1: 64-K color (16 bits)
X-direction edge data correction (Right-left dummy row
addition)
0y0: OFF
0y1: ON
Period correction
0y0: OFF
0y1: ON
SRC1 image’s front address (Higher 8 bits of 32 bits)
Description
During Write
0y0: Flag clear
0y1: Invalid
Address
During Write
0y0: Flag clear
0y1: Invalid
(0xF205_0000) + (0x0000)
TMPA901CM
2010-07-29