TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 726

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

3.22.2.5 Top-Priority Conversion Mode
3.22.2.6 AD Monitoring Function
3.22.2.7 AD Conversion Time
Example: When AN7 top-priority AD conversion is started up with ADMOD2 <HPADCH[2:0]>
conversion start
Conversion
channel
Top-priority AD
conversion. Top-priority AD conversion can be started up by software while setting
ADMOD2<HPADCE> to 1
AD conversion being converted currently is cancelled immediately to execute the
single conversion at a channel specified by ADMOD2<HPADCH[2:0]>. The conversion
result is stored into ADREGSPH/L, generating a top-priority AD conversion interrupt.
After that, conversion is restarted from the channel where normal AD conversion was
cancelled. Note that a top-priority AD conversion started up during another
top-priority AD conversion is ignored.
is
ADMOD3<ADOIBC> can select greater or smaller of comparison format. As register
ADIE<MIE> is Enable, This comparison operation is performed each time when a
result is stored in the corresponding conversion result storage register. When
conditions are met, the interrupt is generated. Be careful that the storage registers
assigned for the AD monitoring function are usually not ready by software, which
means that the overrun flag <OVRx> is always set and the conversion result storage
flag <ADRxRF> is also set.
clock is selected from 1/1, 1/2, 1/4, 1/8 PCLK by <ADCLK[2:0]>. To meet the
guaranteed accuracy, the AD conversion clock needs to be set from 0.625MHz to 33
MHz, or equivalently from 1.39 s to 73.6 s of AD conversion time.
scan conversion at channels AN4 to AN6 with ADMOD0 <REPEAT,SCAN>
ADMOD1<ADCH[2:0]>
Top-priority AD conversion can be performed by interrupting into normal AD
When top-priority AD conversion is started up during normal AD conversion, the
Setting ADMOD3<ADOBSV> to 1 enables the AD monitoring function.
One AD conversion takes 46 clocks including sampling clocks. The AD conversion
The value of Result storage register that is appointed by ADMOD3<REGS [3:0]>
compared
AN4
AN6 conversion canceled
with
0y0110
AN5
the
TMPA901CM- 725
value
AN6
AN7 conversion started
of
AD
AN7
AN6 re-conversion started
conversion
AN6
result
0y111 during repeat
register
AN4
TMPA901CM
2010-07-29
0y11 and
(H/L),
AN5