TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 592

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

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[0]
[Description]
a. <I2STx_ DMAREADY1>
Bit
Note: To disable this register, make sure whether the DMA transfer is completed first and the I2STSLVON
10. I2STDMA1 (Tx DMA Ready Register)
This register indicates the DMA ready state to the hardware logic.
This register should set to “1” by software after both the DMA and I2S operational
configuration are completed, then the hardware logic can be recognized the DMA ready.
And the hardware logic monitors the FIFO and starts DMA transfer.
register set to 0y0, the I2STST<I2STx_STATUS> is SBY and then this register can be set to 0y0.
I2STx_DMAREADY1
Bit Symbol
R/W
Type
TMPA901CM- 591
Undefined
0y0
Reset
Value
Read as undefined. Write as zero.
I2STx DMA ready:
0y0: Disable
0y1: Enable
Address
(0xF204_0000) + (0x0018)
Description
TMPA901CM
2010-07-29