TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 425

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

2.
3.
SSP0CR1 (SSP0 Control register 1)
SSP0DR (SSP0 Data register)
[31:4]
[3]
[2]
[1]
[0]
[31:16]
[15:0]
[Description]
[Description]
a. <SOD>
b. <MS>
a. <DATA>
Bit
Bit
Slave mode output disable. This bit is relevant only in the slave mode (<MS>
following order.
You must right-justify data when the SSP is programmed for a data size that is less than 16
bits. Unused bits at the top are ignored by the transmit logic. The receive logic
automatically right-justifies.
Master/slave mode select. When transmit mode with Slave mode, must be set it in the
1. Set to Slave mode (<MS> = 1)
2. Set transmit data to FIFO
3. Set SSP to enable (<SSE> = 1)
Read: Receive FIFO
Write: Transmit FIFO
SOD
MS
SSE
Reserved
DATA
Symbol
Symbol
Bit
Bit
R/W
R/W
R/W
R/W
R/W
Type
Type
TMPA901CM- 424
Undefined
0y0
0y0
0y0
0y0
Undefined
0x0000
Reset
Reset
Value
Value
Read as undefined. Write as zero.
Slave mode SP0DO output disable:
0y0: Enable
0y1: Disable
Master/slave mode select:
0y0: The device is a master.
0y1: The device is a slave.
SSP enable:
0y0: Disable
0y1: Enable
Write as zero.
Read as undefined. Write as zero.
Transmit/receive FIFO data:
0x00 to 0xFF
Address
Address
Description
Description
(0xF200_2000) + (0x0004)
(0xF200_2000) + (0x0008)
TMPA901CM
2010-07-29
1).