TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 585

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

c.
d. <I2SRx_MSBINV>
e. <I2SRx_WSINV>
f.
Selects the data to be output when an underflow occurs in the FIFO.
0y0: 0 is output.
0y1: The current data is held.
Selection from LSB/MSB first.
0y0: MSB first
0y1: LSB first
Specifies whether to invert the channel definition of WS.
0y0: WS = 1 (RCH), WS = 1 (LCH)
0y1: WS channel definition inverted
0y1: No delay from WS
Selects Relationship between Data output timing and WS.
0y0: Delay of 1CLOCK from WS
<I2SRx_UNDERFLOW>
<I2SRx_DELAYOFF>
WS = 0 (RCH), WS = 1 (LCH)
TMPA901CM- 584
TMPA901CM
2010-07-29