TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 668
TMPA901CMXBG
Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet
1.TMPA901CMXBG.pdf
(858 pages)
Specifications of TMPA901CMXBG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
Details
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Manufacturer
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[31:24]
[23:16]
[15:8]
[7:0]
[Description]
a. <OFSETY[7:0]>
b. <HCRCT[7:0]>
c.
Bit
8. LDACR2 (LCDDA Control Register 2)
<VCRCT[7:0]>
Sets the offset value for the vertical pixel sampling steps in the scaler circuit. By setting
a value of 0x01 to 0xFF, the set pixel point is sampled first.
Sets the horizontal period correction values in the scaler circuit.
Setting the LDACR0<PCEN> to 0y1 enables this bit. By setting a value of 0x01 to 0xFF,
the set pixel point is corrected to the point one point right-side to the original pixel.
Sets the vertical period correction values in the scaler circuit.
Setting the LDACR0<PCEN> to 0y1 enables this bit. By setting a value of 0x01 to 0xFF,
the set pixel point is corrected to the point one line below the original pixel.
OFSETY[7:0]
HCRCT[7:0]
VCRCT[7:0]
Symbol
Bit
R/W
R/W
R/W
Type
TMPA901CM- 667
0x0000
Undefined
0x00
0x00
Reset
Value
Offset value for vertical sampling point during scaler use
Read as undefined. Write as zero.
Horizontal period correction value
Vertical period correction value
Description
Address
(0xF205_0000) + (0x0018)
TMPA901CM
2010-07-29
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