TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 118

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

b. < FlowCntrl>
c.
d. <SrcPeripheral>
e. <E>
Note: When you selected Memory-to-Memory, hardware start triggered by DMA is not supported. Transfer is started
To temporarily stop DMA transfer, use the <Halt> bit to disable DMA requests, poll the
<Active> bit until it becomes 0, and then clear the <E> bit to disable the channel.
This bit is used to enable or disable the channel. If the channel is disabled during a transfer,
the data in the channel’s FIFO will be lost. To re-start, the channel must be reset.
<DestPeripheral>
This bit sets the transfer mode.
0y000: Memory to Memory
0y001: Memory to Peripheral
0y010: Peripheral to Memory
0y011: Peripheral to Peripheral
0y100 to 0y111: Reserved
This is a DMA request peripheral number in binary.
This setting will be ignored if memory is specified as the transfer destination.
This is a DMA request peripheral number in binary.
This setting will be ignored if memory is specified as the transfer source.
The structure and description of these registers are same as DMACC0Configuration.
Please refer to the description of DMACC0Configuration.
The names and addresses of these registers, please refer to Table 3.8.3.
by writing <E>= 1.
DMACCxConfiguration (DMAC Channel x Configuration Register)(x = 0 to 7)
TMPA901CM- 117
TMPA901CM
2010-07-29