TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 426

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
4. SSP0SR (SSP0 Status register)
5. SSP0CPSR (SSP0 Clock prescale register)
[31:5]
[4]
[3]
[2]
[1]
[0]
[31:8]
[7:0]
[Description]
[Description]
a. <BSY>
a. <CPSDVSR>
Bit
Bit
This bit indicates, when set to 1 (BSY = 1), that a frame is currently being transmitted or
received or the transmit FIFO is not empty.
frequency of PCLK. The least significant bit always returns 0y0 on reads.
Clock prescale divisor. Must be an even number from 2 to 254, depending on the
BSY
RFF
RNE
TNF
TFE
CPSDVSR
Symbol
Symbol
Bit
Bit
RO
RO
RO
RO
RO
R/W
Type
Type
TMPA901CM- 425
Undefined
0y0
0y0
0y0
0y1
0y1
Undefined
0x0000
Reset
Reset
Value
Value
Read as undefined.
Busy flag:
0y0: IDLE
0y1: Busy
Receive FIFO full flag:
0y0: Receive FIFO is not full.
0y1: Receive FIFO is full.
Receive FIFO empty flag:
0y0: Receive FIFO is empty.
0y1: Receive FIFO is not empty.
Transmit FIFO full flag:
0y0: Transmit FIFO is full.
0y1: Transmit FIFO is not full.
Transmit FIFO empty flag:
0y0: Transmit FIFO is not empty.
0y1: Transmit FIFO is empty.
Read as undefined. Write as zero.
Clock prescale divisor:
Must be an even number from 2 to 254.
Address
Address
Description
Description
(0xF200_2000) + (0x000C)
(0xF200_2000) + (0x0010)
TMPA901CM
2010-07-29

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