TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 91

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

10. VICSWPRIORITYMASK (Software Priority Mask Register)
11. VICVECTADDR0 (Vector Address 0 Register)
[31:16]
[15:0]
[31:0]
[Description]
[Description]
a. <SWPriorityMask>
a. <VectorAddr 0>
Bit
Bit
VICVECTADDRn (Vector Address n Register)(n = 0 to 6, 8, 10 to12, 14, 16 to 18, 20, 21,23,
27, 30, 31)
This register can be set the software priority level.
SWPriorityMask [15:0] correspond to priority levels 15 to 0, respectively.
This register can be set the address for Interrupt Service Routine of interrupt sources.
Before changing the setting of this register, be sure to disable the relevant interrupts.
The structure and description of these registers are same as VICVECTADDR0.
Please refer to the description of VICVECTADDR0.
For the names and addresses of these registers, please refer to Table 3.7.2.
Example: When SWPriorityMask [15:0] = 0xFF7F, interrupts of priority level 7 are masked.
VectorAddr 0
SWPriorityMask
Symbol
Symbol
Bit
Bit
R/W
R/W
Type
Type
TMPA901CM- 90
Undefined
0xFFFF
0x00000000
Reset
Value
Reset
Value
ISR address for interrupt source 0
Read as undefined. Write as zero.
Masks software priority level
0y0: Mask
0y1: Do not mask
Address
Address
ISR: Interrupt Service Routine
Description
(0xF400_0000) + (0x0024)
(0xF400_0000) + (0x0100)
Description
TMPA901CM
2010-07-29