TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 545

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
Data flow on
USB cable
Register access
EP0_DATASET
INT_STATUS
INT_SETUP
INT_EP0
UDC2
Host
Note: Figure 3.16.21 shows the flow in High-Speed transfers. In Full-Speed transfers, the "PING" packet shown in
1.
2.
3.
(3) Control-WR transfer (with DATA-Stage)
Figure 3.16.21 Flow of control in Control-WR transfers (with DATA-Stage)
the figure is not issued. Also, the "NYET" packet is replaced by the "ACK" packet.
To be processed in the same way as in the SETUP-Stage described in (1).
When the data is received from the host with no problem, UDC2 asserts the
EP0_DATASET flag and asserts the INT_EP0 flag. When this flag is asserted, read the
data from EP0_FIFO after confirming the received data size in the EP0_Datasize
register, or read the data from EP0_FIFO polling the EP0_DATASET flag.
When the byte size of received data has been read, UDC2 deasserts the EP0_DATASET
flag.
To be processed in the same way as in the STATUS-Stage described in (1).
SETUP-Stage
DATA-Stage
STATUS-Stage
SETUP
The flow of control in Control-WR transfer (with DATA-Stage) is shown below.
SETUP-Stage
INT-Reg.
(8 bytes)
DATA0
Read
ACK
INT-Reg.
Write
Register Read (8 bytes)
Setup-Data storage
OUT
(Received data)
DATA1
Issue Setup_Received
Command
NAK
PING
TMPA901CM- 544
ACK
OUT
INT-Reg.
(Received data)
Read
DATA1
DATA-Stage (OUT)
INT-Reg.
NYET
Write
EP0_FIFO Read
PING
ACK
OUT
INT-Reg.
Read
(Received data)
DATA0/1
INT-Reg.
Write
NYET
EP0_FIFO Read
Issue Setup_Fin
Command
TMPA901CM
STATUS-Stage
IN
2010-07-29
INT-Reg.
DATA1
(0 byte)
Read
ACK
INT-Reg.
Write

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