TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 469

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

[31:0]
Bit
[Description]
mrcadr
completed in Master Read transfer (AHB to UDC2).
value to the DMAC Read Request register and then read the value from the DMAC Read Value
register.
a. <mrcadr>
Displays the address where the transfer from the target device to the endpoint has
This register cannot be read by directly specifying the address. In order to read it, set a
17. UDMRCADR (Master Read Current Address register)
Symbol
Displays the address to which transfers from the target device to the endpoint have been
currently completed in Master Read transfers.
This address is incremented at the point when the data is set from the Master Read buffer
to the endpoint, while the data will reside inside the FIFO for the endpoint during the
Master Read transfer process until the displayed address.
Bit
RO
Type
0x00000000
TMPA901CM- 468
Reset
Value
Master Read current address
Address =(0xF440_0000)+ (0x0058)
Description
TMPA901CM
2010-07-29