TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 147

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
3. GPIODFR2 (Port D Function Register 2)
4. GPIODIS (Port D Interrupt Select Register (Level and Edge))
[31:8]
[7:4]
[3:0]
[31:8]
[7:6]
[5:0]
[Description]
[Description]
Note:
a. <PD7F2 to PD4F2>
a. <PD7IS to PD6IS>
Bit
Bit
level-sensitive.
Function register 2: Controls the function setting.
Interrupt sensitivity register: Selects the interrupt trigger mode from edge-sensitive and
0y0: Edge-sensitive
0y1: Level-sensitive
1 can be set to only one of the function register 1 or the function register 2 at a time.
These registers must not be written as 1 simultaneously even for an instant.
PD7F2 to PD4F2
Reserved
PD7IS to PD6IS
Reserved
Symbol
Symbol
Bit
Bit
General-purpose
Table 3.9.6 Function register setting table
Function 1
Function 2
Prohibited
Mode
R/W
R/W
R/W
R/W
Type
Type
TMPA901CM-146
GPIODFR1 GPIODFR2
Undefined
0y0000
0y0000
Undefined
0y00
0y000000
0
1
0
1
Reset
Reset
Value
Value
Read as undefined. Written as zero.
Port D function register 2
Must be written as 0.
Read as 0.
Read as undefined. Written as zero.
Port D interrupt sensitivity register (for each bit)
0y0: Edge-sensitive
0y1: Level-sensitive
Must be written as 0.
Read as 0.
0
0
1
1
Address
Address
Description
Description
(0xF080_3000) + (0x0428)
(0xF080_3000) + (0x0804)
TMPA901CM
2010-07-29

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