TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 544

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
Data flow on
USB cable
Note: While register accesses required for each request are made to UDC2 between 'Issuing the "Setup_Received"
1.
2.
Figure 3.16.20 Flow of control in Control-WR transfers (without DATA-Stage)
(2) Control-WR transfer (without DATA-Stage)
command' and 'Issuing the "Setup_Fin" command', register accesses are needed after the end of
STATUS-Stage in some cases such as Set Address request and Set Feature (TEST_MODE). Processes
required for the standard requests are described in (5).
After issuing the “Setup_Received” command, make register accesses to UDC2 based
on each request. Issue the “Setup_Fin” command when all the register accesses to
UDC2 have finished. Subsequent processes are basically the same as the
STATUS-Stage described in (1). UDC2 will keep on returning “NAK” until the
“Setup_Fin” command is issued.
SETUP-Stage
STATUS-Stage
Register access
EP0_DATASET
The flow of control in Control-WR transfer (without DATA-Stage) is shown below.
To be processed in the same way as in the SETUP-Stage described in (1).
INT_STATUS
INT_SETUP
INT_EP0
UDC2
Host
SETUP
INT-Reg.
Read
SETUP-Stage
(8 bytes)
DATA0
TMPA901CM- 543
Register Read (8 bytes)
Setup-Data storage
INT-Reg.
ACK
Write
IN
Issue Setup_Received
NAK
Command
STATUS-Stage
Issue Setup_Fin
IN
Command
DATA1
(0 byte)
INT-Reg.
Read
ACK
INT-Reg.
Write
TMPA901CM
2010-07-29

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