TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 166

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

According to the voltage of the connected external memory, set pin and register as follows.
related pin connections and the constant value setting register need be set.
Note: The PMCDRV register should be set during low-speed operation (PLL
According to power voltage, adjust drive power of related ports. In the case of using SDRAM,
The following table shows the required setting.
Connect DMCCLKIN to DMCCLKP
Port drive power set register
PMCDRV<DRV_MEM1:0>
Bus width setting register
Bus width setting register
Note: The two memory controllers cannot be used by dynamically switching between them. The memory controller to
Note: The dmc_user_config_5 register should be set after reset is released and before SDRAM is initialized. This
[SDR SDRAM]
Note: The dmc_user_config_3 register should be set after reset is released and before SDRAM is initialized. This
[DDR SDRAM]
dmc_user_config_3
(Fix DMCCLKIN to GND)
dmc_user_config_5
This pin isn’t used.
Mode setting pin
be used must be fixed.
also applies after HOT_RESET by the PMC is released.
Pin treatment
also applies after HOT_RESET by the PMC is released.
pin treatment
DMCCLKIN
DMCCLKIN
SELDVCCM
0x00000000
0x00000058
0y11
0y01
0
1
Control pin of external memory except NAND Flash operate in the
DVCCM
Control pin of external memory operate in the DVCCM
control pin of external memory except NAND Flash operate in the
DVCCM
control pin of external memory operate in the DVCCM
16bit bus in SDR SDRAM (MPMC0)
16 bit bus in SDR SDRAM (MPMC0)
16bit bus in DDR SDRAM (MPMC1)
16bit bus in DDR SDRAM (MPMC1)
TMPA901CM-165
1.8
1.8
0.1 V.
0.1 V
Operation mode
Operation mode
Operation mode
Operation mode
Operation mode
Operation mode
OFF) after reset is released.
3.3
3.3
0.3 V.
0.3 V
TMPA901CM
2010-07-29