TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 126

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TMPA901CMXBG

Manufacturer Part Number
TMPA901CMXBG
Description
Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
Manufacturer
Toshiba
Datasheet

Specifications of TMPA901CMXBG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
-
Rom Type
ROMless
Ram (kbytes)
32
Number Of Pins
177
Package
BGA
Vcc
3V
Tft Lcd Controller
Y
Touchscreen Controller
Y
Usb Host Fs With Phy
Y
Usb Device Hs With Phy
Y
Sd Host Controller
-
Cmos Image Sensor Interface
-
I2s
1
Ssp (ch) Spi
1
I2mc/sio (ch)
1
Uart/sio (ch)
2
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
8
10-bit Ad Converter
4
12-bit Da Converter
-
16-bit Timer / Counter
6
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
Y
Low-power Modes
Y
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPA901CMXBG
Manufacturer:
Toshiba
Quantity:
10 000
3.9.1
bit mask
GPIOTDATA
Read data
Note: All the bits are valid in accessing 0x03FC, and no bits are valid in accessing 0x0000.
bit mask
GPIOTDATA
Before write
Write data
GPIOTDATA
possible to mask certain bits in reading from or writing to the data registers.
addresses are shifted to the high-order side by 2 bits. The lower 2 bits have no meaning.
Valid addresses exist at every 4 addresses, such as 0x000, 0x0004, and so on.)
vary according to the address to be accessed.
Address bits that are 1 are accessed in the data register and address bits that are 0 are
masked.
[Notes on data registers]
Data Registers
Example: Writing 0x93 to address 0x00E8 of Port T by using bit masks
Example: Reading 0x12 from address 0x00E8 of Port T by using bit masks
All data registers allow all the 8 bits to be read or written simultaneously. It is also
Data registers allow accesses to a 256-address space (0x0000 to 0x03FC). (Assume that
Accesses to the 256-address space are done through the same data register. Valid bits
Bits [9:2] of the address to be accessed correspond to bits [7:0] of the data register.
Address[9:2]
Bit mask
bm7
PT7
Retained Retained 0 Write
bm7
0 Read
0
0
PT7
0 1
PT7
1
1
bm7
Bit9
bm6
PT6
bm6
0 Read
0
0
PT6
0 1
PT6
0
0
bm6
Bit8
bm5
PT5
ビットマスク読み出し例
bm5
0 Read
TMPA901CM-125
1
1
PT5
0 1
PT5
0
0
Bit 7
bm5
bm4
PT4
bm4
1 Write
1 Read
1
1
PT4
0 1
PT4
1
1
Bit 6
bm4
bm3
PT3
bm3
0 Write Retained 1 Write Retained
0 Read
1
1
PT3
0 1
PT3
0
0
Bit 5
bm3
bm2
PT2
bm2
0 Read
0
0
PT2
0 1
PT2
0
Bit 4
bm2
0
bm1
PT1
bm1
1 Read
1
1
PT1
0 1
PT1
Bit 3
bm1
1
1
bm0
PT0
bm0
0 Read
0
0
PT0
0 1
PT0
Bit 2
bm0
1
TMPA901CM
1
2010-07-29

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