TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 271

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

[Description]
a. <burst_align>
b. <bls>
c.
d. <wr_sync>
e. <rd_bl>
f.
g. <mw>
Boot.
<wr_bl>
<rd_sync>
Memory burst boundary split set value:
0y000 = bursts can cross any address boundary
0y001 = split at the 32-beat burst boundary
0y010 = split at the 64-beat burst boundary
0y011 = split at the 128-beat burst boundary
0y100 = split at the 256-beat burst boundary
Other = Reserved
Bls timing :
0y0 = chip select
0y1 = Reserved
Write memory burst length:
0y000 = 1beat
0y001 = 4beats
Other = Reserved
Memory operation mode:
0y0 = asynchronous write operation
0y1 = Reserved
Read memory burst length:
0y000 = 1 beat
0y001 = 4 beats
Other = Reserved
Memory operation mode:
0y0 = asynchronous read operation
0y1 = Reserved
The Reset value depends on setting state. The CS0 memory data bus width can be set for
TMPA901CM-270
TMPA901CM
2010-07-29