EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 79
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EP2AGX190FF35C6N
Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX190FF35C6N.pdf
(306 pages)
Specifications of EP2AGX190FF35C6N
Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 4: DSP Blocks in Arria II Devices
Operational Modes Overview
Operational Modes Overview
Table 4–2. DSP Block Operational Modes for Arria II Devices
December 2010 Altera Corporation
Notes to
(1) This mode also supports loopback mode. In loopback mode, the number of loopback multipliers per DSP block is two. You can use the remaining
(2) Unsigned value is also supported, but you must ensure that the result can be contained in 36 bits.
(3) Dynamic shift mode supports arithmetic shift left, arithmetic shift right, logical shift left, logical shift right, and rotation operation.
(4) Dynamic shift mode operates on a 32-bit input vector, but the multiplier width is configured as 36 bits.
Multiplier Adder
Two-Multiplier
Four-Multiplier
High Precision
Independent
Accumulate
Adder
Multiplier
Shift
Multiply
multipliers in regular two-multiplier adder mode.
Mode
Adder
Table
(3)
(1)
4–2:
36 bits
Multiplier
in Width
18 × 36
Double
12 bits
18 bits
36 bits
18 bits
18 bits
18 bits
9 bits
You can use each Arria II DSP block in one of six basic operational modes.
lists the six basic operational modes and the number of multipliers that you can
implement in a single DSP block.
The DSP block consists of two identical halves (top-half and bottom-half). Each half
has four 18 × 18 multipliers.
The Quartus
of the multipliers. After making the appropriate parameter settings with the
megafunction’s MegaWizard
automatically configures the DSP block.
Arria II DSP blocks can operate in different modes simultaneously. Each half block is
fully independent except for the sharing of the clock, ena, and the aclr signals. For
example, you can break down a single DSP block to operate a 9 × 9 multiplier in one
half block and an 18 × 18 two-multiplier adder in the other half block. This increases
DSP block resource efficiency and allows you to implement more multipliers in an
Arria II device. The Quartus II software automatically places multipliers that can
share the same DSP block resources in the same block.
(4)
Number of
Multiplier
1
1
1
1
1
2
4
4
1
2
®
II software includes megafunctions that control the mode of operation
Block
# per
8
6
4
2
2
2
2
2
2
4
Signed
Signed or
Unsigned
™
Both
Both
Both
Both
Both
Both
Both
Both
Both
Plug-In Manager, the Quartus II software
(2)
Arria II Device Handbook Volume 1: Device Interfaces and Integration
RND,
SAT
Yes
Yes
Yes
Yes
No
No
No
No
No
No
Register
In Shift
Yes
Yes
Yes
No
No
No
No
No
No
No
Chainout
Adder
Yes
Yes
No
No
No
No
No
No
No
—
1st Stage
Add/Sub
Both
Both
Both
—
—
—
—
—
—
—
Table 4–2
2nd Stage
Add Only
Add Only
Add/Acc
Both
4–7
—
—
—
—
—
—
—
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