EP2AGX190FF35C6N Altera, EP2AGX190FF35C6N Datasheet - Page 572

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EP2AGX190FF35C6N

Manufacturer Part Number
EP2AGX190FF35C6N
Description
IC ARRIA II GX 190K 1152FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX190FF35C6N

Number Of Logic Elements/cells
181165
Number Of Labs/clbs
7612
Total Ram Bits
9939
Number Of I /o
612
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
190300
# I/os (max)
612
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
190300
Ram Bits
10380902.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2AGX190FF35C6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2AGX190FF35C6N
Manufacturer:
ALTERA
0
Part Number:
EP2AGX190FF35C6N
0
3–14
Arria II Device Handbook Volume 2: Transceivers
1
Figure 3–5
Figure 3–5. Transceiver Channel Instances before Compilation for Example 4
Figure 3–6
Figure 3–6. Combined Transceiver Instances after Compilation for Example 4
You can force the placement of the transceiver channels in specific transceiver banks
by assigning pins to the tx_dataout and rx_datain ports of inst0 and inst1.
Ch1 of inst0
Effective Data Rate: 3.125 Gbps
Ch0 of inst0
Effective Data Rate: 3.125 Gbps
Effective Data Rate: 3.125 Gbps
Ch3 of inst0
Effective Data Rate: 3.125 Gbps
Ch2 of inst0
shows the transceiver instances before compilation for Example 4.
shows the transceiver instances after compilation for Example 4.
Transceiver Block 0
Base Data Rate:
3.125 Gbps
CMU PLL
Chapter 3: Configuring Multiple Protocols and Data Rates in Arria II Devices
Effective Data Rate: 3.125 Gbps
Input Clock Frequency: 156.125 MHz
Number of Channels: 7
Effective Data Rate: 3.125 Gbps
Input Clock Frequency: 156.25 MHz
Number of Channels: 1
Inst0
Inst1
Combining Transceiver Instances in Multiple Transceiver Blocks
Effective Data Rate: 3.125 Gbps
Effective Data Rate: 3.125 Gbps
Ch5 of inst0
Ch4 of inst0
Ch0 of inst1
Effective Data Rate: 3.125 Gbps
Ch6 of inst0
Effective Data Rate: 3.125 Gbps
Transceiver Block 1
Base Data Rate:
3.125 Gbps
December 2010 Altera Corporation
CMU PLL

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